{"id":2219,"date":"2008-08-23T02:53:36","date_gmt":"2008-08-23T02:53:36","guid":{"rendered":"http:\/\/192.168.0.71:9090\/?p=1779"},"modified":"2008-08-23T02:53:36","modified_gmt":"2008-08-23T02:53:36","slug":"atmega8535-%ed%83%80%ec%9d%b4%eb%a8%b8%ec%b9%b4%ec%9a%b4%ed%84%b0-%ec%a0%9c%ec%96%b4-%ec%8b%9c%ea%b3%84-%ec%84%a4%ea%b3%84","status":"publish","type":"post","link":"https:\/\/talsu.net\/?p=2219","title":{"rendered":"ATmega8535 – \ud0c0\uc774\uba38,\uce74\uc6b4\ud130 \uc81c\uc5b4 \uc2dc\uacc4 \uc124\uacc4"},"content":{"rendered":"

Code Vison AVR C
\n<\/strong><\/span><\/p>\n

ATmega 8535
\n<\/strong><\/span><\/p>\n

\n\u00a0<\/p>\n

\ud0c0\uc774\uba38\/\uce74\uc6b4\ud130
\n<\/strong><\/span><\/p>\n

\"\"\/\n\t<\/p>\n

\ud45c\uc2dc\ub41c \ud3ec\ud2b8\ub4e4\uc744 \uc0ac\uc6a9 \ud55c\ub2e4.\n<\/p>\n

\n\u00a0<\/p>\n

\n\u00a0<\/p>\n

\ud0c0\uc774\uba38 \uce74\uc6b4\ud130 0
\n<\/strong><\/span><\/p>\n

\ud0c0\uc774\uba38\/\uce74\uc6b4\ud130 0 \ub294 \ubc94\uc6a9\uc774\uba70 \uc2f1\uae00\ucc44\ub110 8\ube44\ud2b8 \ud0c0\uc774\uba38\/\uce74\uc6b4\ud130 \ubaa8\ub4c8\uc774\ub2e4.\n<\/p>\n

\ud0c0\uc774\uba38\/\uce74\uc6b4\ud130 0\uc740 overflow \uc778\ud130\ub7fd\ud2b8(\ud0c0\uc774\uba38\/\uc678\ubd80 \uc785\ub825 \uce74\uc6b4\ud130), \ube44\uad50\uc77c\uce58 \uc778\ud130\ub7fd\ud2b8, PWM\uc73c\ub85c \uc0ac\uc6a9\ub41c\ub2e4.\n<\/p>\n

ATmega8535\uc5d0\ub294 \ud0c0\uc774\uba38\/\uce74\uc6b4\ud130 0\uc5d0\ub294 \ucd9c\ub825\uc744 \uc704\ud55c OC0(PB3)\ud540\uacfc \uce74\uc6b4\ud130 \uc785\ub825\uc744 \uc704\ud55c T0(PB0)\ud540\uc774 \uc788\ub2e4.\n<\/p>\n

\uc774\uac83\uc774 \ud0c0\uc774\uba38\ub85c \ub3d9\uc791\ud560 \uacbd\uc6b0\ub294 \uc2dc\uc2a4\ud15c \ud074\ub7ed \uc18c\uc2a4\ub85c \uc0ac\uc6a9\ud558\uba70, \uc2dc\uc2a4\ud15c \ud074\ub85d\uc740 \ud504\ub9ac\uc2a4\ucf00\uc77c\ub7ec\uc5d0 \uc758\ud574 1, 18, 64,256, 1024 \uc911\uc758 \ud558\ub098\ub85c \ubd84\uc8fc\ud558\uc5ec \ud074\ub85d \uc18c\uc2a4\ub85c \uacf5\uae09\ub41c\ub2e4. \ud074\ub85d \uc785\ub825\uc744 \ucc28\ub2e8\ud558\uba74 \ud0c0\uc774\uba38\/\uce74\uc6b4\ud130 \uae30\ub2a5\uc774 \uc815\uc9c0\ub41c\ub2e4.\n<\/p>\n

TCNT0 \ub808\uc9c0\uc2a4\ud130\uc5d0 \ub3d9\uc791 \ubaa8\ub4dc\uc5d0 \ub530\ub77c \ud074\ub85d\uc5d0\uc11c \uc785\ub825\ub418\ub294 \uac12\uc774 \uc800\uc7a5\ub418\uba70 0xFF\uc5d0\uc11c 0x00\ub418\ub294 \uc21c\uac04 overflow \uc778\ud130\ub7fd\ud2b8\uac00 \ubc1c\uc0dd\ud55c\ub2e4. \ub610 \ucd9c\ub825 \ube44\uad50 \uc77c\uce58 \ub808\uc9c0\uc2a4\ud130 OCR0\uc640 \ube44\uad50\ud558\uc5ec \uadf8 \uac12\uc774 \uc77c\uce58\ud558\uba74 \ucd9c\ub825\ube44\uad50\uc77c\uce58 \uc778\ud130\ub7fd\ud2b8\uac00 \ubc1c\uc0dd\ud55c\ub2e4.\n<\/p>\n

\n\u00a0<\/p>\n

\n\u00a0<\/p>\n

\n\u00a0<\/p>\n

TCCR0 \ub808\uc9c0\uc2a4\ud130 (Timer\/Counter 0 Control Register)
\n<\/strong><\/span><\/p>\n

\ud0c0\uc774\uba38 \uc81c\uc5b4 \ub808\uc9c0\uc2a4\ud130\ub85c\uc368 \ub2e4\ub984\uacfc \uac19\uc740 \uad6c\uc870\ub85c \ub418\uc5b4 \uc788\uace0 \uc5ed\uc2dc 8\ube44\ud2b8\ub85c \uc14b\ud305\ud55c\ub2e4.\n<\/p>\n

\n\n\n\n\n\n\n\n\n\n<\/colgroup>\n\n\n
\n

FOC0<\/strong><\/span><\/p>\n<\/td>\n

\n

WGM0<\/strong><\/span><\/p>\n<\/td>\n

\n

COM1<\/strong><\/span><\/p>\n<\/td>\n

\n

COM0<\/strong><\/span><\/p>\n<\/td>\n

\n

WGM1<\/strong><\/span><\/p>\n<\/td>\n

\n

CS2<\/strong><\/span><\/p>\n<\/td>\n

\n

CS1<\/strong><\/span><\/p>\n<\/td>\n

\n

CS0<\/strong><\/span><\/p>\n<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<\/div>\n

    \n
  1. \n
    FOC<\/strong> (Force Output Compare) : Normal\uacfc CTC\ubaa8\ub4dc\uc5d0\uc11c \uc774 \ube44\ud2b8\uac00 1\ub85c \uc14b\ud305 \ub418\ub294 \uc21c\uac04 OC0\uc5d0 \ucd9c\ub825\uac12\uc774 \ub098\uc624\uac8c \ud558\ub294 \uac83\uc73c\ub85c \uadf8\ub2e4\uc9c0 \ub9ce\uc774 \uc0ac\uc6a9 \ub418\uc9c0 \uc54a\ub294\ub2e4.\n<\/div>\n<\/li>\n
  2. \n
    WGM0, WGM1<\/strong> (Waveform Generation Mode): \ud0c0\uc774\uba38\uc758 \ub3d9\uc791 \ubaa8\ub4dc\ub97c \uacb0\uc815\ud558\ub294 \ube44\ud2b8\ub85c\uc368 4\uac00\uc9c0 \ubaa8\ub4dc\ub97c \uc120\ud0dd \ud55c\ub2e4.\n<\/div>\n<\/li>\n<\/ol>\n
    \n\n\n\n\n<\/colgroup>\n\n\n\n\n\n\n
    \n

    WGM0<\/strong><\/span><\/p>\n<\/td>\n

    		\n

    WGM1<\/strong><\/span><\/p>\n<\/td>\n

    		\n

    MODE<\/strong><\/span><\/p>\n<\/td>\n<\/tr>\n

    \n

    0<\/strong><\/span><\/p>\n<\/td>\n

    		\n

    0<\/strong><\/span><\/p>\n<\/td>\n

    		\n

    Normal<\/span><\/p>\n<\/td>\n<\/tr>\n

    \n

    1<\/strong><\/span><\/p>\n<\/td>\n

    		\n

    0<\/strong><\/span><\/p>\n<\/td>\n

    		\n

    PWM<\/span><\/p>\n<\/td>\n<\/tr>\n

    \n

    0<\/strong><\/span><\/p>\n<\/td>\n

    		\n

    1<\/strong><\/span><\/p>\n<\/td>\n

    		\n

    CTC<\/span><\/p>\n<\/td>\n<\/tr>\n

    \n

    1<\/strong><\/span><\/p>\n<\/td>\n

    		\n

    1<\/strong><\/span><\/p>\n<\/td>\n

    		\n

    Fast PWM<\/span><\/p>\n<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<\/div>\n

    Normal \ubaa8\ub4dc<\/strong> : 0\uc5d0\uc11c 255\uae4c\uc9c0 \ub3c4\ub2ec\ud558\uac8c \ub418\uba74 \uc778\ud130\ub7fd\ud2b8\ub97c \ubc1c\uc0dd\ud558\uace0 \ub2e4\uc2dc 0\uc73c\ub85c \ub3cc\uc544\uac00\ub294 \ubaa8\ub4dc\ub85c \ucd08\uae30 \uac12\uc744 \uc870\uc808 \ud558\uc5ec \uc8fc\uae30\ub97c \ub354 \uc9e7\uac8c \ub9cc\ub4e4 \uc218 \uc788\ub2e4. \uc5c5 \uce74\uc6b4\ud130\ub85c\ub9cc \ub3d9\uc791\ud558\uba70, \uce74\uc6b4\ud2b8\uac00 \ub3d9\uc791 \uc911 \ud074\ub9ac\uc5b4 \ub418\uc9c0 \uc54a\uc73c\uba70, \ud56d\uc0c1 0x00\uc5d0\uc11c 0xFF\ub85c \ubc18\ubcf5 \ud55c\ub2e4.\n<\/p>\n

    CTC \ubaa8\ub4dc<\/strong> : 0\uc5d0\uc11c \ud504\ub85c\uadf8\ub798\uba38\uac00 \uc14b\ud305\ud574 \ub454 \uac12\uc5d0 \ub3c4\ub2ec\ud558\uba74 \uc778\ud130\ub7fd\ud2b8\ub97c \ubc1c\ud589 \uc2dc\ud0a4\uace0 \ub2e4\uc2dc 0\uc73c\ub85c \ub3cc\uc544\uac00\ub294 \ubaa8\ub4dc, 0x00 -> OCR0\uc758 \uac12\uc73c\ub85c \uce74\uc6b4\ud130\ub97c \ubc18\ubcf5 \uc218\ud589 \ud55c\ub2e4.\n<\/p>\n

    PWM \ubaa8\ub4dc<\/strong> : \ub514\uc9c0\ud138\uc801\uc73c\ub85c \uc544\ub0a0\ub85c\uadf8\ub97c \uc81c\uc5b4\ud558\ub294 \ubc29\ubc95 (\uc804\uad6c\uc758 \ubc1d\uae30, \ubaa8\ud130\uc758 \uc18d\ub3c4..)\n<\/p>\n

    \n\u00a0<\/p>\n

      \n
    1. \n
      COM1, COM0<\/strong> (Compare Match Output Mode) : OC0 \ud540\uc758 \uae30\ub2a5\uc744 \uc815\ud55c\ub2e4.\n<\/div>\n<\/li>\n<\/ol>\n
      \n\n\n\n\n<\/colgroup>\n\n\n\n\n\n\n
      \n

      COM1<\/strong><\/span><\/p>\n<\/td>\n

      		\n

      COM0<\/strong><\/span><\/p>\n<\/td>\n

      		\n

      MODE<\/strong><\/span><\/p>\n<\/td>\n<\/tr>\n

      \n

      0<\/strong><\/span><\/p>\n<\/td>\n

      		\n

      0<\/strong><\/span><\/p>\n<\/td>\n

      		\n

      \ubc94\uc6a9 I\/O \ud3ec\ud2b8\ub85c \ub3d9\uc791(OC0 \ud540 \ucc28\ub2e8)<\/span><\/p>\n<\/td>\n<\/tr>\n

      \n

      0<\/strong><\/span><\/p>\n<\/td>\n

      		\n

      1<\/strong><\/span><\/p>\n<\/td>\n

      		\n

      OC0 \ud540 \ucd9c\ub825 \ud1a0\uae00<\/span><\/p>\n<\/td>\n<\/tr>\n

      \n

      1<\/strong><\/span><\/p>\n<\/td>\n

      		\n

      0<\/strong><\/span><\/p>\n<\/td>\n

      		\n

      OC0 \ud540 \ucd9c\ub825\uc744 0\uc73c\ub85c \ud074\ub9ac\uc5b4<\/span><\/p>\n<\/td>\n<\/tr>\n

      \n

      1<\/strong><\/span><\/p>\n<\/td>\n

      		\n

      1<\/strong><\/span><\/p>\n<\/td>\n

      		\n

      OC0 \ud540 \ucd9c\ub825\uc744 1\ub85c \uc124\uc815<\/span><\/p>\n<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<\/div>\n

        \n
      1. \n
        CS0, CS1, CS2<\/strong> (Clock Select): \ud074\ub7ed\uc758 \ubd84\uc8fc\ub97c \uc124\uc815\ud55c\ub2e4. CPU\uc5d0 \uc0ac\uc6a9\ud55c \ud06c\ub9ac\uc2a4\ud0c8\uc758 \uc8fc\ud30c\uc218\ub97c \uc5bc\ub9c8\ub9cc\ud07c \ubd84\uc8fc \ud560 \uac83\uc778\uc9c0 \uc124\uc815\ud55c\ub2e4.\n<\/div>\n<\/li>\n<\/ol>\n
        \n\n\n\n\n\n<\/colgroup>\n\n\n\n\n\n\n\n\n\n\n
        \n

        CS2<\/strong><\/span><\/p>\n<\/td>\n

        		\n

        CS1<\/strong><\/span><\/p>\n<\/td>\n

        		\n

        CS0<\/strong><\/span><\/p>\n<\/td>\n

        		\n

        \uae30\ub2a5<\/strong><\/span><\/p>\n<\/td>\n<\/tr>\n

        \n

        0<\/strong><\/span><\/p>\n<\/td>\n

        		\n

        0<\/strong><\/span><\/p>\n<\/td>\n

        		\n

        0<\/strong><\/span><\/p>\n<\/td>\n

        		\n

        \ud074\ub7ed \uc785\ub825 \ucc28\ub2e8(\ud0c0\uc774\uba38 \uc0ac\uc6a9 \uc548\ud568)<\/span><\/p>\n<\/td>\n<\/tr>\n

        \n

        0<\/strong><\/span><\/p>\n<\/td>\n

        		\n

        0<\/strong><\/span><\/p>\n<\/td>\n

        		\n

        1<\/strong><\/span><\/p>\n<\/td>\n

        		\n

        \uc2dc\uc2a4\ud15c\ud074\ub7ed \/ 1<\/span><\/p>\n<\/td>\n<\/tr>\n

        \n

        0<\/strong><\/span><\/p>\n<\/td>\n

        		\n

        1<\/strong><\/span><\/p>\n<\/td>\n

        		\n

        0<\/strong><\/span><\/p>\n<\/td>\n

        		\n

        \uc2dc\uc2a4\ud15c\ud074\ub7ed \/ 8<\/span><\/p>\n<\/td>\n<\/tr>\n

        \n

        0<\/strong><\/span><\/p>\n<\/td>\n

        		\n

        1<\/strong><\/span><\/p>\n<\/td>\n

        		\n

        1<\/strong><\/span><\/p>\n<\/td>\n

        		\n

        \uc2dc\uc2a4\ud15c\ud074\ub7ed \/ 64<\/span><\/p>\n<\/td>\n<\/tr>\n

        \n

        1<\/strong><\/span><\/p>\n<\/td>\n

        		\n

        0<\/strong><\/span><\/p>\n<\/td>\n

        		\n

        0<\/strong><\/span><\/p>\n<\/td>\n

        		\n

        \uc2dc\uc2a4\ud15c\ud074\ub7ed \/ 256<\/span><\/p>\n<\/td>\n<\/tr>\n

        \n

        1<\/strong><\/span><\/p>\n<\/td>\n

        		\n

        0<\/strong><\/span><\/p>\n<\/td>\n

        		\n

        1<\/strong><\/span><\/p>\n<\/td>\n

        		\n

        \uc2dc\uc2a4\ud15c\ud074\ub7ed \/ 1024<\/span><\/p>\n<\/td>\n<\/tr>\n

        \n

        1<\/strong><\/span><\/p>\n<\/td>\n

        		\n

        1<\/strong><\/span><\/p>\n<\/td>\n

        		\n

        0<\/strong><\/span><\/p>\n<\/td>\n

        		\n

        \uc678\ubd80 \uc785\ub825 \ud074\ub7ed \ud558\uac15 \uc5e3\uc9c0<\/span><\/p>\n<\/td>\n<\/tr>\n

        \n

        1<\/strong><\/span><\/p>\n<\/td>\n

        		\n

        1<\/strong><\/span><\/p>\n<\/td>\n

        		\n

        1<\/strong><\/span><\/p>\n<\/td>\n

        		\n

        \uc678\ubd80 \uc785\ub825 \ud074\ub7ed \uc0c1\uc2b9 \uc5e3\uc9c0<\/span><\/p>\n<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<\/div>\n

        \n\u00a0<\/p>\n

        OCR0 (Output Compare Register)\ub808\uc9c0\uc2a4\ud130
        \n<\/strong><\/span><\/p>\n

        \ubd84\uc8fc\ub41c \ud074\ub7ed\uc774 \uba87 \ubc88 \ubc1c\uc0dd\ud55c \ud6c4 \uc778\ud130\ub7fd\ud2b8\ub97c \ubc1c\uc0dd\ud558\uac8c \ud558\ub294\uc9c0\ub97c \uc124\uc815\ud558\ub294 \ub808\uc9c0\uc2a4\ud130\n<\/p>\n

        Ex) OCR0 = 125;\u00a0\u00a0\u00a0\u00a0 \u00a0\u00a0\u00a0\u00a0<\/em>\/\/ \ud074\ub7ed\uc774 125\ubc88 \ubc1c\uc0dd\ud558\uba74 \uc778\ud130\ub7fd\ud2b8\ub97c \ubc1c\uc0dd\ud55c\ub2e4.
        \n<\/span><\/strong><\/span><\/p>\n

        (\uacb0\uad6d \ubd84\uc8fc\uc758 \uae30\ub2a5\uc744 \uac00\uc9c0\uace0 \uc788\uc74c)\n<\/p>\n

        \n\u00a0<\/p>\n

        TCNT0 (Timer\/Counter Register)\ub808\uc9c0\uc2a4\ud130
        \n<\/strong><\/span><\/p>\n

        TCNT0 \ub808\uc9c0\uc2a4\ud130\ub294 \ud504\ub85c\uadf8\ub7a8\uc774 \uc2e4\ud589\ub418\ub294 \ub3d9\uc548 \ubd84\uc8fc\ub41c \ud074\ub7ed\uc758 \uc8fc\uae30\ub85c 0\uc5d0\uc11c \ubd80\ud130 \uba87 \ubc88\uc9f8 \uc8fc\uae30\uac00 \ubc1c\ud589 \ud588\ub294\uc9c0 \ub098\ud0c0\ub0b8\ub2e4. \uc774 \ub808\uc9c0\uc2a4\ud130\ub294 \uc4f8 \uc218\ub3c4 \uc788\uace0 \uc77d\uc744 \uc218\ub3c4 \uc788\ub2e4. \uac12\uc744 \uc4f0\uba74 \uc8fc\uae30\ub97c \ub354 \ube60\ub974\uac8c \ud560 \uc218 \uc788\ub2e4. \ub808\uc9c0\uc2a4\ud130\uc758 \uac12\uc740 \uc778\ud130\ub7fd\ud2b8\uac00 \uac78\ub9ac\uba74 \uc790\ub3d9\uc73c\ub85c 0\uc73c\ub85c \ud074\ub9ac\uc5b4 \ub418\uace0 \ub2e4\uc2dc \ubd84\uc8fc\ub41c \uc8fc\uae30\ub9c8\ub2e4 \ud55c \uac1c\uc529 \uac12\uc774 \ub298\uc5b4\ub09c\ub2e4.\n<\/p>\n

        \n\u00a0<\/p>\n

        TIMSK (Timer\/Counter Interrupt Mask Register)\ub808\uc9c0\uc2a4\ud130
        \n<\/strong><\/span><\/p>\n

        \n\u00a0<\/p>\n

        \n\n\n\n\n\n\n\n\n\n<\/colgroup>\n\n\n
        \n

        TOIE1<\/strong><\/span><\/p>\n<\/td>\n

        		\n

        OCIE1A<\/strong><\/span><\/p>\n<\/td>\n

        		\n

        OCIE1B<\/strong><\/span><\/p>\n<\/td>\n

        		\n

        OCIE2<\/strong><\/span><\/p>\n<\/td>\n

        		\n

        TICE1<\/strong><\/span><\/p>\n<\/td>\n

        		\n

        TOIE2<\/strong><\/span><\/p>\n<\/td>\n

        		\n

        TOIE0<\/strong><\/span><\/p>\n<\/td>\n

        		\n

        OCIE0<\/strong><\/span><\/p>\n<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<\/div>\n

        \n\u00a0<\/p>\n

        \n\t\tTOIE0(Timer0 Overflow Interrupt Enable)<\/strong> \ube44\ud2b8\ub97c 1\ub85c \uc14b\ud305\ud558\uace0 \uc2dc\uc2a4\ud15c \uc778\ud130\ub7fd\ud2b8\ub97c \uc778\uc5d0\uc774\ube14 \ud558\uba74 Normal\ubaa8\ub4dc\uc758 \ud0c0\uc774\uba38 \uc778\ud130\ub7fd\ud2b8\uac00 \uc791\ub3d9.\n<\/p>\n

        \n\t\tOCIE0(Timer0 Output Compare Match Interrupt Enable)<\/strong> \ube44\ud2b8\ub97c 1\ub85c \uc14b\ud305\ud558\uace0 \uc2dc\uc2a4\ud15c \uc778\ud130\ub7fd\ud2b8\ub97c \uc778\uc5d0\uc774\ube14 \ud558\uba74 CTC\ubaa8\ub4dc\uc758 \ud0c0\uc774\uba38 \uc778\ud130\ub7fd\ud2b8\uac00 \uc791\ub3d9.\n<\/p>\n

        \n\u00a0<\/p>\n

        \uc0ac\uc6a9 \ud568\uc218
        \n<\/span><\/p>\n

        sei( )<\/strong> : \uc778\ud130\ub7fd\ud2b8\ub97c \uc778\uc5d0\uc774\ube14 \uc2dc\ud0a4\ub294 \ud568\uc218\n<\/p>\n

        sli( )<\/strong> : sei\uc758 \ubc18\ub300 \ub418\ub294 \uac83\uc73c\ub85c \uc2dc\uc2a4\ud15c \uc778\ud130\ub7fd\ud2b8\ub97c \ub514\uc2a4\uc5d0\uc774\ube14 \uc2dc\ud0a8\ub2e4.\n<\/p>\n

        SIGNAL( )<\/strong> : \uc778\ud130\ub7fd\ud2b8\uac00 \ubc1c\uc0dd \ud588\uc744 \ub54c \uc774 \ud568\uc218\ub85c \uc810\ud504\ud55c\ub2e4.\n<\/p>\n

        SIG_OUTPUT_COMPARE0<\/strong> : \ub0b4\ubd80, \uc678\ubd80 \uad00\uacc4 \uc5c6\uc774 \uc778\ud130\ub7fd\ud2b8\uac00 \ubc1c\uc0dd\ud558\uba74 \ud574\ub2f9 \ubc88\ud638\uc5d0 \ub530\ub978 \ubc88\uc9c0\ub85c \uc810\ud504\ud558\uac8c \ub41c\ub2e4.\n<\/p>\n

        \n\u00a0<\/p>\n

        \n\u00a0<\/p>\n

        \ud0c0\uc774\uba38\/\uce74\uc6b4\ud2b8\ub97c \uc774\uc6a9\ud55c LCD \uc2dc\uacc4\ub97c \ub9cc\ub4e4\uc5b4 \ubcf4\uc790
        \n<\/strong><\/span><\/p>\n

        \/*********************************************
        \n<\/strong><\/span><\/p>\n

        This program was produced by Talsu
        \n<\/strong><\/span><\/p>\n

        Date : 2008-02-22
        \n<\/strong><\/span><\/p>\n

        *********************************************\/
        \n<\/strong><\/span><\/p>\n

        \n\u00a0<\/p>\n

        #include <mega8535.h>
        \n<\/em><\/p>\n

        #include <stdio.h>
        \n<\/em><\/p>\n

        #asm
        \n<\/em><\/p>\n

        .equ __lcd_port=0x15 ;PORTC
        \n<\/em><\/p>\n

        #endasm
        \n<\/em><\/p>\n

        #include <lcd.h>
        \n<\/em><\/p>\n

        unsigned char key;
        \n<\/em><\/p>\n

        unsigned char sec_cnt;
        \n<\/em><\/p>\n

        unsigned char sec0;
        \n<\/em><\/p>\n

        unsigned char min0;
        \n<\/em><\/p>\n

        unsigned char hour0;
        \n<\/em><\/p>\n

        unsigned char bang_cnt;
        \n<\/em><\/p>\n

        unsigned char bang;
        \n<\/em><\/p>\n

        unsigned char backslash[8]={ <\/em>\/\/CG RAM\uc5d0 \uc785\ub825\ud560 \uae00\uc790 \ud328\ud134\uc744 \uc800\uc7a5\ud558\ub294 \ud568\uc218<\/strong><\/span>
        \n\t\t<\/em><\/p>\n

        0b00001110,
        \n<\/em><\/p>\n

        0b00010001,
        \n<\/em><\/p>\n

        0b00011011,
        \n<\/em><\/p>\n

        0b00010001,
        \n<\/em><\/p>\n

        0b00010101,
        \n<\/em><\/p>\n

        0b00010101,
        \n<\/em><\/p>\n

        0b00001110,
        \n<\/em><\/p>\n

        0b00000000};
        \n<\/em><\/p>\n

        \n\u00a0<\/p>\n

        unsigned char ms1;
        \n<\/em><\/p>\n

        \n\u00a0<\/p>\n

        void define_char(unsigned char *pc,unsigned char char_code)
        \n<\/em><\/p>\n

        \/*CG RAM\uc5d0 \uae00\ud30c \ud328\ud134\uc744 \uc785\ub825\ud558\ub294 \ud568\uc218*\/
        \n<\/span><\/p>\n

        {
        \n<\/em><\/p>\n

        unsigned char i,a;
        \n<\/em><\/p>\n

        a=(char_code<<3) | 0x40;
        \n<\/em><\/p>\n

        for (i=0; i<8; i++) lcd_write_byte(a++, *pc++);
        \n<\/em><\/p>\n

        }
        \n<\/em><\/p>\n

        interrupt [TIM0_OVF] void timer0_ovf_isr(void)\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0<\/em>\/\/\uce74\uc6b4\ud130 \uc778\ud130\ub7fd\ud2b8\uc5d0 \ubc18\uc751 \ud558\ub294 \ud568\uc218<\/strong><\/span>
        \n\t\t<\/em><\/p>\n

        {
        \n<\/em><\/p>\n

        sec_cnt++;
        \n<\/em><\/p>\n

        if(sec_cnt == 125){ \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0<\/em>\/\/0.1\ucd08\ub97c \ub9de\ucd94\uae30\uc704\ud55c \ubd84\uc8fc<\/strong><\/span>
        \n\t\t<\/em><\/p>\n

        ms1++;
        \n<\/em><\/p>\n

        bang_cnt++;
        \n<\/em><\/p>\n

        sec_cnt = 0;
        \n<\/em><\/p>\n

        PORTA = ~PORTA;
        \n<\/em><\/p>\n

        }
        \n<\/em><\/p>\n

        TCNT0 = 256 – 25;
        \n<\/em><\/p>\n

        }
        \n<\/em><\/p>\n

        \n\u00a0<\/p>\n

        void main(void)
        \n<\/em><\/p>\n

        {
        \n<\/em><\/p>\n

        char lcd_text[16];
        \n<\/em><\/p>\n

        char lcd_text2[1];
        \n<\/em><\/p>\n

        \n\u00a0<\/p>\n

        PORTA=0x55;
        \n<\/em><\/p>\n

        DDRA=0xFF;
        \n<\/em><\/p>\n

        \n\u00a0<\/p>\n

        DDRD=0x00;
        \n<\/em><\/p>\n

        PORTD=0xFF;
        \n<\/em><\/p>\n

        \n\u00a0<\/p>\n

        \/\/ Timer\/Counter 0 initialization
        \n<\/span><\/p>\n

        \/\/ Clock source: System Clock
        \n<\/span><\/p>\n

        \/\/ Clock value: 31.250 kHz
        \n<\/span><\/p>\n

        \/\/ Mode: Normal top=FFh
        \n<\/span><\/p>\n

        \/\/ OC0 output: Disconnected
        \n<\/span><\/p>\n

        TCCR0=0x04;
        \n<\/em><\/p>\n

        TCNT0=256-250;
        \n<\/em><\/p>\n

        OCR0=0x00;
        \n<\/em><\/p>\n

        \n\u00a0<\/p>\n

        \/\/ Timer(s)\/Counter(s) Interrupt(s) initialization
        \n<\/span><\/p>\n

        TIMSK=0x01;
        \n<\/em><\/p>\n

        \n\u00a0<\/p>\n

        \/\/ Analog Comparator initialization
        \n<\/span><\/p>\n

        \/\/ Analog Comparator: Off
        \n<\/span><\/p>\n

        \/\/ Analog Comparator Input Capture by Timer\/Counter 1: Off
        \n<\/span><\/p>\n

        ACSR=0x80;
        \n<\/em><\/p>\n

        SFIOR=0x00;
        \n<\/em><\/p>\n

        \n\u00a0<\/p>\n

        \/\/ LCD module initialization
        \n<\/span><\/p>\n

        lcd_init(16);
        \n<\/em><\/p>\n

        \n\u00a0<\/p>\n

        #asm(“sei”)
        \n<\/em><\/p>\n

        define_char(backslash,0); <\/em>\/\/CG RAM\uc5d0 \uc6d0\ud558\ub294 \ud328\ud134\uc744 \uc785\ub825<\/strong><\/span>
        \n\t\t<\/em><\/p>\n

        lcd_clear();
        \n<\/em><\/p>\n

        \n\u00a0<\/p>\n

        while (1)
        \n<\/em><\/p>\n

        {
        \n<\/em><\/p>\n

        \u00a0\u00a0\u00a0\u00a0key = PIND & 0xFF;
        \n<\/em><\/p>\n

        \u00a0\u00a0\u00a0\u00a0if(key == 0b11111110){
        \n<\/em><\/p>\n

        \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0hour0++;
        \n<\/em><\/p>\n

        \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0}
        \n<\/em><\/p>\n

        if (ms1 == 10){ \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0<\/em>\/\/0.1\ucd08\uac00 10\ubc88 \uce74\uc6b4\ud2b8\ub418\uba74<\/strong><\/span>
        \n\t\t<\/em><\/p>\n

        sec0++; \u00a0\u00a0\u00a0\u00a0<\/em>\/\/1\ucd08 \uc99d\uac00<\/strong><\/span>
        \n\t\t<\/em><\/p>\n

        ms1 = 0;\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0<\/em>\/\/0\uc73c\ub85c \ucd08\uae30\ud654<\/strong><\/span>
        \n\t\t<\/em><\/p>\n

        }
        \n<\/em><\/p>\n

        if (sec0 == 60){
        \n<\/em><\/p>\n

        min0++;
        \n<\/em><\/p>\n

        sec0 = 0;
        \n<\/em><\/p>\n

        }
        \n<\/em><\/p>\n

        if (min0 == 60){
        \n<\/em><\/p>\n

        hour0++;
        \n<\/em><\/p>\n

        min0 = 0;
        \n<\/em><\/p>\n

        }
        \n<\/em><\/p>\n

        if (hour0 ==24){
        \n<\/em><\/p>\n

        hour0 = 0;
        \n<\/em><\/p>\n

        }
        \n<\/em><\/p>\n

        if (bang_cnt == 4){
        \n<\/em><\/p>\n

        bang_cnt = 0;
        \n<\/em><\/p>\n

        }
        \n<\/em><\/p>\n

        switch (bang_cnt){
        \n<\/em><\/p>\n

        case 0: bang = ‘|’; break;
        \n<\/em><\/p>\n

        case 1: bang = ‘\/’; break;
        \n<\/em><\/p>\n

        case 2: bang = ‘-‘; break;
        \n<\/em><\/p>\n

        case 3: bang = 0xA4; break;\u00a0\u00a0\u00a0\u00a0<\/em>\/\/\uc800\uc7a5\ub41c \ud328\ud134\uc744 \ubd88\ub7ec\uc634<\/strong><\/span>
        \n\t\t<\/em><\/p>\n

        }
        \n<\/em><\/p>\n

        \n\u00a0<\/p>\n

        \u00a0\u00a0\u00a0\u00a0lcd_gotoxy(0,0);
        \n<\/em><\/p>\n

        \u00a0\u00a0\u00a0\u00a0sprintf(lcd_text, ” %2dh %2dm %2d.%is “,hour0,min0,sec0,ms1);\u00a0\u00a0\u00a0\u00a0<\/em>\/\/\uc2dc\uac04\uc744 \ucd9c\ub825<\/strong><\/span>
        \n\t\t<\/em><\/p>\n

        \u00a0\u00a0\u00a0\u00a0lcd_puts(lcd_text);
        \n<\/em><\/p>\n

        \u00a0\u00a0\u00a0\u00a0sprintf(lcd_text2,”%c”,bang);
        \n<\/em><\/p>\n

        \u00a0\u00a0\u00a0\u00a0lcd_gotoxy(0,1);
        \n<\/em><\/p>\n

        \u00a0\u00a0\u00a0\u00a0lcd_puts(lcd_text2);
        \n<\/em><\/p>\n

        \u00a0\u00a0\u00a0\u00a0lcd_putchar(0);
        \n<\/em><\/p>\n

        lcd_puts(lcd_text2);
        \n<\/em><\/p>\n

        lcd_putsf(“…nclab..”);
        \n<\/em><\/p>\n

        lcd_puts(lcd_text2);
        \n<\/em><\/p>\n

        lcd_putchar(0);
        \n<\/em><\/p>\n

        lcd_puts(lcd_text2);
        \n<\/em><\/p>\n

        };
        \n<\/em><\/p>\n

        }<\/em><\/p>\n

        ik53.pdf<\/a><\/p>\n","protected":false},"excerpt":{"rendered":"

        Code Vison AVR C ATmega 8535 \u00a0 \ud0c0\uc774\uba38\/\uce74\uc6b4\ud130 \ud45c\uc2dc\ub41c \ud3ec\ud2b8\ub4e4\uc744 \uc0ac\uc6a9 \ud55c\ub2e4. \u00a0 \u00a0 \ud0c0\uc774\uba38 \uce74\uc6b4\ud130 0 \ud0c0\uc774\uba38\/\uce74\uc6b4\ud130 0 \ub294 \ubc94\uc6a9\uc774\uba70 \uc2f1\uae00\ucc44\ub110 8\ube44\ud2b8 \ud0c0\uc774\uba38\/\uce74\uc6b4\ud130 \ubaa8\ub4c8\uc774\ub2e4. \ud0c0\uc774\uba38\/\uce74\uc6b4\ud130 0\uc740 overflow \uc778\ud130\ub7fd\ud2b8(\ud0c0\uc774\uba38\/\uc678\ubd80 \uc785\ub825 \uce74\uc6b4\ud130), \ube44\uad50\uc77c\uce58 \uc778\ud130\ub7fd\ud2b8, PWM\uc73c\ub85c \uc0ac\uc6a9\ub41c\ub2e4. ATmega8535\uc5d0\ub294 \ud0c0\uc774\uba38\/\uce74\uc6b4\ud130 0\uc5d0\ub294 \ucd9c\ub825\uc744 \uc704\ud55c OC0(PB3)\ud540\uacfc \uce74\uc6b4\ud130 \uc785\ub825\uc744 \uc704\ud55c T0(PB0)\ud540\uc774 \uc788\ub2e4. \uc774\uac83\uc774 \ud0c0\uc774\uba38\ub85c \ub3d9\uc791\ud560 \uacbd\uc6b0\ub294 \uc2dc\uc2a4\ud15c \ud074\ub7ed \uc18c\uc2a4\ub85c \uc0ac\uc6a9\ud558\uba70, \uc2dc\uc2a4\ud15c […]<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"spay_email":""},"categories":[17],"tags":[57,60,379,436,446],"jetpack_featured_media_url":"","jetpack_sharing_enabled":true,"jetpack_shortlink":"https:\/\/wp.me\/pXV5a-zN","_links":{"self":[{"href":"https:\/\/talsu.net\/index.php?rest_route=\/wp\/v2\/posts\/2219"}],"collection":[{"href":"https:\/\/talsu.net\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/talsu.net\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/talsu.net\/index.php?rest_route=\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/talsu.net\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=2219"}],"version-history":[{"count":0,"href":"https:\/\/talsu.net\/index.php?rest_route=\/wp\/v2\/posts\/2219\/revisions"}],"wp:attachment":[{"href":"https:\/\/talsu.net\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=2219"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/talsu.net\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=2219"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/talsu.net\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=2219"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}